Active standard | Published: 08/06/2021

IEC 61691-6-ed.2.0

Behavioural languages - Part 6: VHDL Analog and Mixed-Signal Extensions

Available languages: English

Available design: electronic design (pdf), CD-ROM

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Detail information

Designation: IEC 61691-6-ed.2.0

Publication date: 08/06/2021

Pages: 671

Country: International technical standard

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Anotation

IEC 61691-6:2021(E) defines IEC 61691-6/IEEE Std 1076.1 language, a hardware description language for the description and the simulation of analog, digital, and mixed-signal systems. The language, also informally known as VHDL-AMS, is built on the IEC 61691-1-1/IEEE 1076 (VHDL) language and extends it to provide capabilities of writing and simulating analog and mixed-signal models. This standard is published as a double logo IEC-IEEE standard.

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