Aktívna norma | Vydaná: 24.03.2015

IEEE/IEC 61523-4-2015

IEEE/IEC International Standard - Design and Verification of Low-Power Integrated Circuits

Dostupné jazyky: Anglicky

Dostupné prevedenie: Zabezpečené PDF - okamžité stiahnutie, Tlačené

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Podrobné informácie

Označenie: IEEE/IEC 61523-4-2015

Dátum vydania: 24.03.2015

Stránok: 351

Krajina: Medzinárodná technická norma

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Anotácia

Adoption Standard - Active.
A method is provided for specifying power intent for an electronic design, for use in
verification of the structure and behavior of the design in the context of a given power management
architecture, and for driving implementation of that power management architecture. The method
supports incremental refinement of power intent specifications required for IP-based design flows.

ISBN: 978-2-8322-2266-9, 978-0-7381-9613-8
Number of Pages: 351
Product Code: STD20159, STDPD20159
Keywords: corruption semantics, IEEE 1801™, interface specification, IP reuse, isolation, level shifting, power-aware design, power domains, power intent, power modes, power states, progressive design refinement, retention, retention strategies, IEC 61523-4
Category: Design Automation

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