IEC 62530-ed.3.0

Podrobné informácie

Označenie: IEC 62530-ed.3.0

Dátum vydania: 26.07.2021

Stránok: 1315

Krajina: Medzinárodná technická norma

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Anotácia

IEC 62530:2021(E) provides the definition of the language syntax and semantics for the IEEE 1800™ SystemVerilog language, which is a unified hardware design, specification, and verification language. The standard includes support for behavioral, register transfer level (RTL), and gate-level hardware descriptions; testbench, coverage, assertion, object-oriented, and constrained random constructs; and also provides application programming interfaces (APIs) to foreign programming languages. This edition corrects errors and clarifies aspects of the language definition in IEEE Std 1800-2012.1 This revision also provides enhanced features that ease design, improve verification, and enhance cross-language interactions. This publication has the status of a double logo IEEE/IEC standard.