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Active standard | Published: 27/01/2011
IEC 60191-6-17-ed.1.0
Mechanical standardization of semiconductor devices - Part 6-17: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for stacked packages - Fine-pitch ball grid array and fine-pitch land grid array (P-PFBGA and P-PFLGA)
(Normalisation mecanique des dispositifs a semiconducteurs - Partie 6-17: Regles generales pour la preparation des dessins d´encombrement des dispositifs a semiconducteurs a montage en surface - Guide de conception pour les boitiers empiles - Boitiers matriciels a billes et a pas fins et boitiers matriciels a zone de contact plate et a pas fins (P-PFBGA et P-PFLGA))
Available languages: English and French
Available design: electronic design (pdf), Print design, CD-ROM
from 317.80 USD
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Detail information
Designation: IEC 60191-6-17-ed.1.0
Publication date: 27/01/2011
Pages: 53
Country: International technical standard
Where to buy?
You can buy at www.mystandards.bizAnotation
IEC 60191-6-17:2011 provides outline drawings and dimensions for stacked packages and individual stackable packages in the form of FBGA or FLGA. La CEI 60191-6-17:2011 fournit les dessins dencombrement et les dimensions pour les boitiers empiles et les boitiers empilables individuels sous forme de FBGA ou FLGA.Popular Publishers
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